1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device in which the input/output pads of a semiconductor chip and the inner leads of the frame on which the semiconductor chip is mounted are connected electrically by bonding wires.
2. Description of the Prior Art
Usually, a plurality of input/output pads are formed around a semiconductor chip. In a semiconductor integrated circuit device, such input/output pads and the inner leads of the frame on which the semiconductor chip is mounted are connected electrically, for example, by wire bonding so that the semiconductor chip can electrically communicate with circuits or devices formed or placed outside its package.
Conventionally, in a semiconductor integrated circuit device, input/output pads are arranged as shown in FIG. 5A; that is, input/output pads 11a, 11b, 11c, . . . are arranged in a line along each side of a semiconductor chip 1, at intervals that increase toward a corner (d.sub.1 &gt;d.sub.2 &gt; . . . ). Alternatively, as shown in FIG. 6, input/output pads 11a, 11b, 11c, . . . are arranged in two lines along each side of a semiconductor chip 1, at regular intervals (d is constant).
On the other hand, as shown in FIG. 7, a typical frame has, with respect to each side of the semiconductor chip 1, inner leads 23 arranged in an area wider than the area in which the input/output pads are arranged (this will hereafter be referred to as "radial arrangement of the inner leads").
This causes the input/output pads that are arranged closer to a corner to form smaller wire angles .theta. (i.e. the angles that the wires 3a, 3b, . . . , 3m, 3n, . . . form with respect to the corresponding side of the semiconductor chip 1). As a result, if, as shown in FIG. 5B, the input/output pads are arranged at regular intervals (d.sub.1 =d.sub.2 = . . . ), the distances between the wires, as measured near the semiconductor chip 1, become shorter and shorter toward a corner (W.sub.1 &lt;W.sub.2), increasing the risk of a short circuit occurring between wires. To avoid this, in the arrangement shown in FIG. 5A, the input/output pads are arranged at intervals that increase toward a corner. This, however, inevitably increases the chip size.
On the other hand, in the arrangement shown in FIG. 6, the input/output pads are arranged in two lines and at regular intervals, and therefore, as long as the same number of input/output pads are arranged, the arrangement of FIG. 6 requires a smaller chip size than those of FIGS. 5A and 5B. However, the use of a typical frame, in which the inner leads are arranged radially, causes the wire angles to become smaller and smaller toward a corner until, as indicated by arrow Y in FIG. 6, two adjacent wires 3a and 3b, which are connected to an outer pad 11a and an inner pad 11b respectively, cross each other.
This can be avoided by varying the wiring heights of adjacent wires. This, however, increases the thickness of the semiconductor integrated circuit device as a whole. It should be noted that an increase in thickness is as undesirable as an increase in area. Incidentally, the arrangement shown in FIG. 6 is very effective in cases where sufficiently large wire angles .theta. can be secured for all pads, though a special arrangement of the inner leads 23 is required on the part of the frame to secure sufficiently large wire angles .theta. for all pads.